Recently, system power management has become an important area in the electronics industry. More specifically, reducing the amount of power required to maintain a system in an operational state has become one of the main focuses of the industry. One of the ways in which the system power is conserved is to remove power from non-essential areas of the system during certain periods of operation. By powering down certain portions of a system which are not currently in use, the outputs of the powered down portions of the system become unregulated. Therefore, the inputs of the operational portion of the system are not always receiving an input signal which is at a normal operational voltage level. The unregulated voltage received at these inputs can float from anywhere between zero volts up to the full power supply voltage. These so called floating input voltages are applied to the CMOS input buffers on conventional CMOS Integrated circuits (ICs), Gate Arrays and other Application Specific Integrated Circuits (ASICs). The application of these floating input voltages can cause the transistors which form the input buffer to burn out. The input buffers burn out when the floating input voltages reach a level which is high enough to turn ON one of the transistors of the input buffer while not being high enough to turn OFF the other transistor. This results in two transistors which are intended to be ON for different input conditions both being weakly turned ON at the same time. When both transistors are weakly ON, the system power is shorted to ground. By shorting power to ground, a high level of current runs through the transistors and burns them out. When the input buffers burn out, the entire chip is inoperative and must be replaced.
Current methods used in the electronics industry to avoid the shortage of power to ground caused by floating inputs include the connection of a pull-up resistor or a pull-down resistor to the inputs on the CMOS IC. The pull-up resistor connects the input pin of the CMOS IC to system power through the pull-up resistor. Using a pull-up resistor on an input buffer is disadvantageous, because an input left in a logic high state could power logic external to the IC through the external device's input/output protection diodes. If the input is able to power the external logic, the input buffer would become loaded down causing the input voltage to decrease to a voltage sufficiently low to turn ON both input transistors of the CMOS gate, thus having the potential to short the system power supply to the system ground. In addition, a pull-up resistor dissipates power when the input signal has a low logic level and current flows from the system power through the pull-up resistor to ground.
In a similar manner, the pull-down resistor connects the input pin of the CMOS IC to system ground. The main disadvantage in using a pull-down resistor is that whenever the input is driven high by the external logic, power is dissipated through the pull-down resistor. The total system power which is dissipated is a function of the number of inputs with pull-down resistors and the resistance value of each pull-down resistor. The level of dissipation caused by pull-down resistors may be considerable for many low power systems.
Another protection method which is used for CMOS ICs is the replacement of the CMOS input buffers with bipolar input buffers. One disadvantage of using a bipolar input buffer is that bipolar transistors have a higher power dissipation than CMOS transistor. Additionally, by mixing CMOS and bipolar technologies on the same IC, the manufacturing costs of the IC are considerably higher. Another option would be to move the bipolar input buffers off the chip and use external bipolar input buffers. However, the problems associated with the higher power dissipation of the bipolar buffers still exists. A further disadvantage includes the costs of adding additional components to the system. Lastly, components that are added to the system take up valuable circuit board real estate which is an important factor in the design of many portable electronic systems.
A further method currently used to protect floating inputs entails driving a zero from the input pin when the external logic is powered off, thus providing the input buffer with a constant zero voltage rather than a floating voltage value. The main disadvantage of the zero driving solution is that it may cause additional power dissipation. In addition, by driving a zero out for power down conditions, all input signals must normally be active high signals to enable them to ignore the zero input when the power is down. Requiring all signals to be active high signals may cause problems in the system logic if the input is not originally intended to be an active high signal. Lastly, an external pull-down resistor may still be needed to prevent burn out of the input buffer during the transition periods before and after the application of the zero voltage.
From the forgoing, it can be seen that a need continues to exist in the prior art for a CMOS input buffer which can tolerate a floating input without requiring external components to protect the input and without causing additional demands on the capacity of the system power.